1. Field of The Invention
The present invention relates to electronic discrete-time (sampled) analog signal processing circuits, particularly those circuits that process multiple signal channels in parallel, more particularly in applications where the quantity of interest is not the absolute signal voltage on any one channel but the difference between each channel and some common baseline.
2. The Prior Art
There are many applications where it is desirable to examine the voltages or currents present on a plurality of signal lines, and to make decisions or perform some signal processing based upon the knowledge of which of the plurality of signals is of the highest or lowest magnitude. Numerous circuits are known which evaluate the magnitudes of signals appearing on a plurality of signal lines and perform a defined function in response to the identification of the signal line bearing the signal of interest. For example, a "winner-take-all" circuit is described in U.S. Pat. No. 5,059,814. An adaptable winner-take-all circuit is described and claimed in U.S. Pat. No. 5,146,106 to Anderson et al.
An electronic analog minimum and maximum detectors are disclosed and claimed in co-pending application Ser. No. 07/895,934, filed Jun. 8, 1992, entitled Object Position Detector, assigned to the same assignee as the present invention.
A Monolithic Sixteen Channel Analog Array Normalizer is described by Gilbert in Journal of Solid State Circuits, Vol. SC-19, No. 6, 1984. This circuit may be used to scale voltages to a common range.